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Hacking up Honda's ECU
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PostPosted: Thu Nov 18, 2004 1:38 pm 
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Location: Cincinnati, Ohio
http://www.pgmfi.org/twiki/bin/view/Lib ... leshooting

Please take a moment to browse through that section before posting. If you have any feedback or suggestions of things to add or problems you have run across, please post or add to the wiki. Your forum username will also allow you to edit content on the wiki.

thanks,
-Dave


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PostPosted: Thu Nov 18, 2004 1:57 pm 
I think you pretty much summed it up in a nutshell......


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PostPosted: Thu Nov 18, 2004 4:53 pm 
Nice 8)


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PostPosted: Sat Nov 20, 2004 1:37 am 
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Location: San Jose, CA
I am getting solid CELs with my chipped JDM P30 with stock binaries. But the car runs with the CEL light on, and it actually runs pretty well with one of the binaries. (BTW, no CEL with J1 cut.) I would think that, if the latch, ROM socket or any of the passive components are mis-soldered, that the software op codes and data from the ROM would not be read properly by the CPU and the engine would not run at all. This leads me to believe my soldering is ok. Is it possible that the car would run at all, let alone well, if the solid CEL was caused by a soldering or component problem?

Thanks


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PostPosted: Tue Nov 23, 2004 2:17 am 
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Duh! I should have read the wiki. I saw the note about the backup processor. Now I know why my engine runs with a solid CEL.

I checked each pair of adjacent pins on the 373 latch and the ROM socket in our JDM P30 to ensure that my soldering did not result in any shorts. There were no solder bridges. I then checked continuity from each pin to at least one other destination of that signal elswhere on the board. I learned that I had an open circuit between pin 17 of the 373 and pin 7 of the 66K MCU. This open circuit would have prevented address number 5 from getting to the ROM. I resoldered the connection at pin 17 of the 373 and then checked to ensure I hadn't created a short with either of the adjacent pins. Other than that open circuit, all of the other pins had continuity to the traces on the board.

I tried two different stock P30 binaries after the repair, including the one ltdannear sent me, and we still get a solid CEL from the ECU and no datalogging. I am at a loss as to what to do next to try to debug this.

This JDM ECU is a P30-901 with a 246 code on the CPU. We successfully converted it from automatic to manual, and tested it with J1 cut and it worked fine, pre and post chipping.

Based on my continuity testing, I developed a procedure for debugging the latch and ROM circuits. Please let me know if you think I should add this to blundar’s troubleshooting section of the wiki.

Please check my work! I have been known to make mistakes.

Of course I’m not sure it is such a good idea to post this, since I am still getting a solid CEL. Any suggestions on where I should go from here?

Thanks
----------------------------------------------------------------------------------

This procedure was developed using a JDM P30-901 ECU, ID 246.

The 373 latch and the ROM socket signals are all connected between those two ICs, plus the 66K MCU, IC9 (a 541 buffer chip) and RM3 (a resistor pack).

First, with a continuity tester (I have a DVM that beeps), test each pair of adjacent pins around the 373 latch and the ROM socket to ensure that you have not created a solder bridge between two pins. There should not be continuity between any two adjacent pins.

Second, with the continuity tester, check each pin on the 373 latch and then the ROM to ensure it has continuity to at least one of the items that it should be connected to per the data below. Put one probe on the pin where it enters the package, and the other probe on one of the items on the list. I listed the feed-throughs (labeled “FT”) in addition to the IC pins, as they can be used to test continuity from the IC pin to the board as well.

For the DIPs (Dual Inline Packages), the pins are numbered starting with 1 down the left side with the notch at the top. Sometimes pin one is marked with a dot. The numbers continue back up the right side with the last pin being opposite the first pin at the top. Pin names starting with a “/” are active low. The SIP Single Inline Package) resistor pack RM3 Pin 1 is indicated on the silk screen.

The 66K MCU pin 1 is in the middle of one side of the square package. Some of the pins around the package have pin numbers silk screened on the board so it is easy to find the MCU pins.

Here are the connections I discovered for each pin:

373 Latch:
Pin 1 (/OE) -> 373 Pin 10 -> FT -> ROM Pin 14 (GND) -> ROM Pin 20 (/CE)
Pin 2 (1Q) -> RM3 Pin 5 -> ROM Pin 10 (A0)
Pin 3 (1D) -> RM3 Pin 9 -> ROM Pin 11 (I/O0) -> 66K Pin 2 (AD0) -> IC9 Pin 11
Pin 4 (2D) -> RM3 Pin 8 -> ROM Pin 12 (I/O1) -> 66K Pin 3 (AD1) -> IC9 Pin 12
Pin 5 (2Q) -> ROM Pin 9 (A1)
Pin 6 (3Q) -> ROM Pin 8 (A2)
Pin 7 (2D) -> RM3 Pin 7 -> ROM Pin 13 (I/O2) -> 66K Pin 4 (AD2) -> IC9 Pin 13
Pin 8 (2D) -> RM3 Pin 6 -> ROM Pin 15 (I/O3) -> 66K Pin 5 (AD3) -> IC9 Pin 14
Pin 9 (4Q) -> ROM Pin 7
Pin 10 (GND) -> 373 Pin 1 -> FT -> ROM Pin 14 (GND) -> ROM Pin 20 (/CE)
Pin 11 (LE) -> C91 -> 66K Pin 24 (ALE)
Pin 12 (5Q) -> ROM Pin 4 (A6)
Pin 13 (5D) -> ROM Pin 18 (I/O6) -> 66K Pin 8 (AD6) -> IC9 Pin 17
Pin 14 (6D) -> ROM Pin 19 (I/O7) -> 66K Pin 9 (AD7) -> IC9 Pin 18
Pin 15 (6Q) -> FT -> ROM Pin 3 (A7)
Pin 16 (7Q) -> FT -> ROM Pin 5 (A5)
Pin 17 (7D) -> ROM Pin 17 (I/O5) -> 66K Pin 7 (AD5) -> IC9 Pin 16
Pin 18 (8D) -> ROM Pin 16 (I/O4) -> 66K Pin 6 (AD4) -> IC9 Pin 15
Pin 19 (8Q) -> ROM Pin 6 (A4)
Pin 20 (VCC) -> C49 -> ROM Pin 28 (VCC) -> ROM Pin 1 (/WE)

ROM Socket:
Pin 1 (VCC) -> ROM Pin 28 (VCC) -> C49 -> 373 Pin 20 (VCC)
Pin 2 (A12) -> 66K Pin 14 (A12)
Pin 3 (A7) -> FT -> 373 Pin 15 (6Q)
Pin 4 (A6) -> FT -> 373 Pin 12 (5Q)
Pin 5 (A5) -> FT -> 373 Pin 16 (7Q)
Pin 6 (A4) -> 373 Pin 19 (8Q)
Pin 7 (A3) -> 373 Pin 9 (4Q)
Pin 8 (A2) -> FT -> 373 Pin 6 (3Q)
Pin 9 (A1) -> FT -> 373 Pin 5 (2Q)
Pin 10 (A0) -> RM3 Pin 5 -> FT -> 373 Pin 2 (1Q)
Pin 11 (I/O0) -> RM3 Pin 9 -> 373 Pin 3 (1D) -> 66K Pin 2 (AD0) -> IC9 Pin 11
Pin 12 (I/O1) -> RM3 Pin 8 -> 373 Pin 4 (2D) -> 66K Pin 3 (AD1) -> IC9 Pin 12
Pin 13 (I/O2) -> RM3 Pin 7 -> 373 Pin 7 (3D) -> 66K Pin 4 (AD2) -> IC9 Pin 13
Pin 14 (GND) -> ROM Pin 20 (/CE) -> FT -> 373 Pin 10 (GND) -> FT -> 373 Pin 1 (/OE)
Pin 15 (I/O3) -> RM3 Pin 6 -> 373 Pin 8 (4D) -> 66K Pin 5 (AD3) -> IC9 Pin 14
Pin 16 (I/O4) -> 373 Pin 18 (8D) -> 66K Pin 6 (AD4) -> IC9 Pin 15
Pin 17 (I/O5) -> 373 Pin 17 (7D) -> 66K Pin 7 (AD5) -> IC9 Pin 16
Pin 18 (I/O6) -> 373 Pin 13 (5D) -> 66K Pin 8 (AD6) -> IC9 Pin 17
Pin 19 (I/O7) -> 373 Pin 14 (6D) -> 66K Pin 9 (AD7) -> IC9 Pin 18
Pin 20 (/CE) -> ROM Pin 14 (GND) -> FT -> 373 Pin 10 (GND) -> FT -> 373 Pin 1 (/OE)
Pin 21 (A10) -> FT -> 66K Pin 12 (A10)
Pin 22 (/OE) -> C29 -> R39 (on the back of the board) -> 66K Pin 25 (/PSEN)
Pin 23 (A11) -> FT -> 66K Pin 13 (A11)
Pin 24 (A9) -> FT -> 66K Pin 11 (A9)
Pin 25 (A8 ) -> FT -> 66K Pin 10 (A8 )
Pin 26 (A13) -> 66K Pin 15 (A13)
Pin 27 (A14) -> 66K Pin 16 (A14)
Pin 28 (VCC) -> ROM Pin 1 (/WE) -> C49 -> 373 Pin 20 (VCC)


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PostPosted: Mon Dec 06, 2004 2:09 am 
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Location: San Jose, CA
I cut J1 to verify that my ECU is still good and it is. I verified all the connections to both chips are per the list above, and can't find any shorts between any of the leads.

I've replaced J1 and tried 70nS Atmel 29C256s, 150nS AMD 27C256s and even a 250nS CSI 28C256. All of them result in a solid CEL with stock P30 bins. I'm using an Intronics Pocket Programmer 2 and all of the PROMs are verifying in the programmer.

Can anybody give me any advice about how to debug my chipping job from here?

Thanks.


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PostPosted: Mon Dec 27, 2004 1:50 pm 
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Location: San Jose, CA
I have solved my solid CEL problem. I chipped this JDM P30 without understanding the circuit. I assumed that all of the capacitors within the dashed lines were decoupling capacitors, so I put 0.1 uF decoupling caps on them all, including C91 and C92.

But C91 and C92 are on data signals. The first is the ALE (Address Latch Enable) signal that controls the 373, and the second is PSEN which is the read signal for the PROM. When I scoped the circuit, I saw a constant 3V on the PSEN line and a constant 0V on the ALE line. When I removed those two caps, the solid CEL went away.

Since both of these signals use edges to latch data, I suspect these caps are there to help ensure the proper shape of the edge. The ECU is working fine without the caps, but it may be somewhat more reliable if they are there.

Per infotechplus's post on the General Hardware Assistance forum, these two caps should have the following value: C91 & C92 --> .00001UF if you plan to use them.


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PostPosted: Mon Nov 14, 2005 3:33 am 
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Location: San Jose, CA
I just added a USDM P28 chipping wirelist to the wiki in the EcuChippingWirelist section.


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PostPosted: Sun Nov 26, 2006 8:18 pm 
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Posts: 133
Your a nut case MarkOLson!!

I just want to say thanks to you guys for making and contributing to this forum..Ive learned so mouch here the past year and I'm just now starting to tune..It's addictive it so fun.
I went from three day ago jusy knowing this stuff from reading on here and HMT E/m section to getting uberdata working with my lm-1 and the A/F lined up dead nut's.
To switching to crome free with freelog. Uber was a great program but crome seems much easier to work with. Freelogs map trace lines up with crome, Making the two work well together.

I switch from stock injectors to 510s today using crome and freelog it worked great my stock rom was good and the injector scaler in crome put it real close to runing like it was with the stock injectors. Just a few minor tweaks and it was good.

WHoa I went on a rant there.

Yeah Blundar the trouble shooting section was really helpful. But it was a little two late for me.
My first P06 I chipped I did a great job on but at the time I didn't know how to set the chip addressing offsets with my batronix burner.
SO ofcoarse when I put the chip in and start the car I get the solid cell.
I didn't know a bad burn would cause solid cels at the time I thought that meant bad a bad chipping job ecu's fried. so I used the p06 to play with and practice soldering and ruined it :shock: Oh well. We learn by doing.

Thanks Blundar.


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PostPosted: Sun Feb 18, 2007 1:17 pm 
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wow that really helps me out.


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PostPosted: Wed Apr 18, 2007 2:38 pm 
i would love to RTFW, but how do i acess it????


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PostPosted: Sat May 26, 2007 9:20 pm 
wnt_2b_boosted wrote:
i would love to RTFW, but how do i acess it????


x2 seems to be offline :roll:


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PostPosted: Tue Jul 03, 2007 11:08 pm 
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If you want to build up your setup you go to honda-tech and if you wanna make sure you setup doesnt go bad you come here I have alot of reading to on here. For some reason the wiki isn't working.


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PostPosted: Wed Jul 04, 2007 4:03 am 
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Location: Morgan Hill, Ca
there is a mirror... check up

http://web.archive.org/web/200507280120 ... ry/WebHome

I have posted this alot so far... lol

blundar needs to reload his server =P


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PostPosted: Tue Jul 10, 2007 3:50 pm 
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Location: ft. collins
Update: I am mirroring the old PGMFI wiki, in non editable form, at http://mycomputerninja.com/~jon/www.pgm ... bHome.html

It has been up for a year or so now, and I intend to keep it up indefinitely for reference. If someone can provide me with the DB dump of the old wiki and the version number of the wiki software they were last on, i can update it to be on the latest system and make it editable again.




old comment:

that mirror only mirrored that index page, and not everything that was linked to it.

on a side note, i have server space that could probably contain the wiki until blundar gets the situation figured out. you can tack an @hotmail.com to my username and hit me up if you need a lower bandwidth host.

I just dont want to see the wiki go away, that has single handedly been the most helpful thing for me, and im sure a lot of other people.


Last edited by sanimalp on Fri Apr 09, 2010 6:46 pm, edited 3 times in total.

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