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 Post subject: Need ASM help badly
PostPosted: Fri Nov 11, 2005 10:30 am 
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Joined: Fri Sep 17, 2004 10:34 am
Posts: 638
Location: Sofia, Bulgaria
that's from a P04's 66301....
Code:
vcal_7:         LB      A, r0
                   STB     A, r2
                   STB     A, r5
label_2c1b:   DEC     DP
                   DECB    r2
                   LCB     A, [DP]
                   ADDB    r6, A
                   JGE     label_2c1b
                   DECB    r2
                   STB     A, 08eh
                   LB      A, r6
                   STB     A, 08fh
                   CLR     A
                   LB      A, r2
                   ADD     X1, A
                   MOV     DP, X1
                   CLRB    A       


lets look at one of the situations: r0=0x08, r1=0x-F, r7=0xC0, r6=0xA3
My bigest problem are the first three lines.....
What is "LB A, r0"???? From reading the instruction manual I came to the conclusion that r0 should hold an address. The instruction should get the byte that is stored at this address, and put the byte in A
However, r0=8 :shock: isn't that the SFR space????
ir is the above just putting 8 into A???
Also, in the label_2c1b loop we decrement r2, which cannot be anything alse than decrementing the number that is stored in the register, correct?? I thought so, but after that we do "LB A, r2" and with all those small numbers stored in r0/r2 it still doesnt make sense that r2 is used as a pointer

Please, someone explain ho i differensiate between moving one register into another and using one register as a pointer to data.....
I know that doing something like "LCB A,[X1]" will use X1 as a pointer but how about the normal L's and LB's that don't use the square brackets around operands.... Do they still work with pointers or are they just the same as "MOV A, r2"

I'm slowly advancing towards understanding the PM5/P04 and these things are just slowing me down quite badly....


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PostPosted: Sat Nov 12, 2005 10:13 pm 
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Joined: Tue Jul 27, 2004 3:01 am
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you need to understand where LBA is set at that point in the program.. this affects the address that R0 is set to. There is a post somewhere that I made a calculator for the R addresses if you know LBA. I canĀ“t remember enough to explain better here, but find my post and you will understand R0-R7 addressing.

R0, R1, R2, etc.. are not separate rom locations
they are a continuous set of locations
if R0 was set to location 0x208, the R1 would be set to 0x209, r2= 0x20A, etc...

So by setting the LBA to a specific location you get direct access to 8 words of RAM with simple addressing. If you group like information in those 8 locations, you can work much faster. If you have to make random memory calls, you waste valuable processor cycles. Using LBA addressing is much faster for repeated operations.

also: er addresses the word associated with the LBA memory locations
er0 = word of r0 & r1
er1 = word of r1 & r3
Acc is the word of A (Lo byte and hi byte)
normally when working with just A you are dealing just the lo byte.

if the Data Descriptor (DD) is set to 1, then you need to handle words (IE use ACC, er0, er1, etc..). if DD is set to 0 you can handle bytes (IE A r0, R1, etc..). Some functions will change the DD by their function, so knowing the NX500 core really helps understand what order you need to work in.

normally you will see LCB A,0045h[x1] which means add the value in X1 to 0045h, take the information in that ROM location and copy it into the Accumulator.

LCB is Load Code Byte (IE access ROM location)
LB is Load Byte (IE access memory location)
both copy the information in the second location to the first location

Mov puts the info in the first location into the memory at the second location.


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PostPosted: Mon Nov 14, 2005 4:02 am 
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I understand most of what you explained, but there are a few more things...

I was left with the inpression that the LB A, r0 was the so called "register direct addressing"..... so everytime this is the case, I should consult LRB since it's the start address and rX is just the offset, correct?

"STB A, 08eh" <- things like that should be "zero-page addressing" so the value of A will go to memory location 0x8E of RAM, is this right?

and just to make my head a complete mess,
"LB A, r0"
does the following.
BYTE* address = LRB+r0
A = *((BYTE*)address)
:?:


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PostPosted: Tue Nov 29, 2005 8:11 pm 
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Joined: Tue Jul 27, 2004 2:21 am
Posts: 268
Location: Milwaukee, WI
no, you're reading way too deeply into it.

LB A, r0 just sets the low 8 bits of A to what's in r0. it's the same as MOV A, r0; it's just a shorter opcode.
STB A, r2 stores the low 8 bits of A into r2. there is -no memory addressing- going on here, except if you consider how registers r0-r8 are stored in RAM, which depends on where LRB is.

so if r0 is 8, it isn't looking for any memory location based on 8. "register direct addressing" just means it directly uses the contents of the register; register -INdirect- addressing would use the contents of a register as an index into memory somewhere.

also, LCB A, [DP] for instance is "load code byte" which means it's using the address in DP as an index into ROM space, which is a totally separate memory area from RAM.

You can also use LB A, [DP] to do pointer indirection in RAM; you'll see that all over the code. If you see [DP] or [X1] or 123h[X1] it's doing pointer indirection (in the latter case with a fixed offset).

Quote:
"STB A, 08eh" <- things like that should be "zero-page addressing" so the value of A will go to memory location 0x8E of RAM, is this right?


Yes, that's right.


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PostPosted: Wed Nov 30, 2005 5:46 am 
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Joined: Fri Sep 17, 2004 10:34 am
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Thanks..... I had some time reading commented code for that and I kind of figured I'm looking too much into it.....
But I really needed some time to realize there are multiple opcodes for one and the same thing.


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PostPosted: Sat Feb 04, 2006 2:16 pm 
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Joined: Tue Jul 27, 2004 3:01 am
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1net wrote:
Thanks..... I had some time reading commented code for that and I kind of figured I'm looking too much into it.....
But I really needed some time to realize there are multiple opcodes for one and the same thing.


Actually each opcode has a specific purpose, be it to handle an 8 bit value or a 16 bit value, or whether you want that particular code to affect a flag like Carry or Zero in a certain fashion..

Also some code take more processor cycles to complete, so there are certain methods that ASM engineers employ to do groups of operations in a way that uses less cycles overall.


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